1. High level synthesis of ASICs under timing and synchronization constraints
پدیدآورنده : by David C. Ku and Giovanni De Micheli
کتابخانه: Library of Campus2 Colleges of Engineering of Tehran University (Tehran)
موضوع : Application specific integrated circuits - Design and construction - Data processing,Computer-aided design
رده :
TK
7874
.
6
.
K8
1992
2. High level synthesis of ASICS undertiming and synchronization constraints
پدیدآورنده : by david C. Ku and Giovanni De Micheli
کتابخانه: Central Library of Campus 1 Technical University of Tehran (Tehran)
موضوع : Application specific integrated circuits - Design and construction--data processing,Computer-Aided design
رده :
TK
7874
.
6
.
Kk8
1992
3. High level synthesis of ASICS undertiming and synchronization constraints
پدیدآورنده : by david C. Ku and Giovanni De Micheli
کتابخانه: Library of Campus2 Colleges of Engineering of Tehran University (Tehran)
موضوع : Application specific integrated circuits - Design and construction--data processing,Computer-Aided design
رده :
TK
7874
.
6
.
Kk8
1992
