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Designing 2D and 3D network-on-chip architectures
پدید آورنده
Tatas, Konstantinos
موضوع
، Networks on a chip
رده
TK
5105
.
546
.
T37D4
کتابخانه
Library of Institute for Research in Fundamental Sciences
محل استقرار
استان:
Tehran
ـ شهر:
Tehran
تماس با کتابخانه :
22291812
-
021
TITLE AND STATEMENT OF RESPONSIBILITY
Title Proper
Designing 2D and 3D network-on-chip architectures
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
New York
Name of Publisher, Distributor, etc.
Springer
Date of Publication, Distribution, etc.
c2014
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
xiii, 265 p.: col., ill.
GENERAL NOTES
Text of Note
Includes bibliographies
Text of Note
ISBN: 1461442737
NOTES PERTAINING TO TITLE AND STATEMENT OF RESPONSIBILITY
Text of Note
Konstantinos Tatas...]et al.[
ORIGINAL VERSION NOTE
Text of Note
1
TOPICAL NAME USED AS SUBJECT
Entry Element
، Networks on a chip
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
5105
.
546
.
T37D4
PERSONAL NAME - PRIMARY RESPONSIBILITY
Entry Element
Tatas, Konstantinos
Relator Code
AU
TI
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