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Verification techniques for system-level design
پدید آورنده
Fujita, Masahiro, 6591-
موضوع
Testing ، Systems on a chip,، Integrated circuits -- Verification,، Formal methods )Computer science(
رده
TK
7895
.
E42F84
کتابخانه
Library of Institute for Research in Fundamental Sciences
محل استقرار
استان:
Tehran
ـ شهر:
Tehran
تماس با کتابخانه :
22291812
-
021
TITLE AND STATEMENT OF RESPONSIBILITY
Title Proper
Verification techniques for system-level design
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Amsterdam
Name of Publisher, Distributor, etc.
Morgan Kaufmann Publishers
Date of Publication, Distribution, etc.
c2008
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
]ix[, 240 p.: ill
SERIES
Other Title Information
The Morgan Kaufmann series in systems on silicon
GENERAL NOTES
Text of Note
Includes bibliographies
Text of Note
ISBN: 9780123706164
NOTES PERTAINING TO TITLE AND STATEMENT OF RESPONSIBILITY
Text of Note
Masahiro Fujita, Indradeep Ghosh, and Mukul Prasad
ORIGINAL VERSION NOTE
Text of Note
1
TOPICAL NAME USED AS SUBJECT
Entry Element
Testing ، Systems on a chip
Entry Element
، Integrated circuits -- Verification
Entry Element
، Formal methods )Computer science(
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
7895
.
E42F84
PERSONAL NAME - PRIMARY RESPONSIBILITY
Entry Element
Fujita, Masahiro, 6591-
Relator Code
AU
AU Ghosh, Indradeep, 1970-
AU Prasad, Mukul
TI
SE
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