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عنوان
A designer's guide to asynchronous VLSI
پدید آورنده
/ Peter A. Beerel, Recep O. Ozdag, Marcos Ferretti
موضوع
Integrated circuits - Very large scale integration - Computer-aided design,Integrated circuits - Very large scale integration - Design and construction
رده
TK7888
.
4
.
B44
2010
کتابخانه
Central Library, Center of Documentation and Supply of Scientific Resources
محل استقرار
استان:
East Azarbaijan
ـ شهر:
تماس با کتابخانه :
04133443834
INTERNATIONAL STANDARD BOOK NUMBER
(Number (ISBN
9780521872447 (hardback)
NATIONAL BIBLIOGRAPHY NUMBER
Country Code
IR
Number
10773
LANGUAGE OF THE ITEM
.Language of Text, Soundtrack etc
انگلیسی
COUNTRY OF PUBLICATION OR PRODUCTlON
Country of publication
IR
TITLE AND STATEMENT OF RESPONSIBILITY
Title Proper
A designer's guide to asynchronous VLSI
General Material Designation
[Book]
First Statement of Responsibility
/ Peter A. Beerel, Recep O. Ozdag, Marcos Ferretti
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Cambridge ;New York
Name of Publisher, Distributor, etc.
: Cambridge University Press
Date of Publication, Distribution, etc.
, 2010.
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
xii, 339 p. , ill
GENERAL NOTES
Text of Note
Language: انگلیسی
NOTES PERTAINING TO PUBLICATION, DISTRIBUTION, ETC.
Text of Note
Print
INTERNAL BIBLIOGRAPHIES/INDEXES NOTE
Text of Note
Includes bibliographical references and index
TOPICAL NAME USED AS SUBJECT
Integrated circuits - Very large scale integration - Computer-aided design
Integrated circuits - Very large scale integration - Design and construction
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK7888
.
4
Book number
.
B44
2010
PERSONAL NAME - PRIMARY RESPONSIBILITY
Beerel, Peter A
PERSONAL NAME - ALTERNATIVE RESPONSIBILITY
Ozdag, Recep O، Joint auth
Ferretti, Marcos، Joint auth
ORIGINATING SOURCE
Country
ایران
old catalog
p
BL
1
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