Verilog® Quickstart is a basic, practical, introductory textbook for professionals and students alike. This book explains how a designer can be more effective through the use of the Verilog hardware description language to simulate and document a design. By understanding simulation, a designer can simulate a design to see if a design works before it is built. This gives the designer an opportunity to try different ideas. Documentation allows a designer to maintain and reuse a design more easily. Verilog's intrinsic hierarchical modularity enables the designer to easily reuse portions of the design as `intellectual property' or `macro-cells'. Verilog® Quickstart presents some of the formal Verilog syntax and definitions and then shows practical uses. This book does not oversimplify the Verilog language nor does it emphasize theory. Verilog® Quickstart has over 100 examples that are used to illustrate aspects of the language. In the later chapters the focus is on working with modeling style and explaining why and when one would use different elements of the language. Another feature of the book is the chapter on state machine modeling. There is also a chapter on test benches and testing strategy as well as a chapter on debugging. Verilog® Quickstart is designed to teach the Verilog language, to show the designer how to model in Verilog and to explain the basics of using Verilog simulators.
ویراست دیگر از اثر در قالب دیگر رسانه
شماره استاندارد بين المللي کتاب و موسيقي
9781461378013
قطعه
عنوان
Springer eBooks
موضوع (اسم عام یاعبارت اسمی عام)
موضوع مستند نشده
Computer engineering.
موضوع مستند نشده
Computer hardware.
موضوع مستند نشده
Computer-aided design.
موضوع مستند نشده
Engineering.
موضوع مستند نشده
Systems engineering.
نام شخص به منزله سر شناسه - (مسئولیت معنوی درجه اول )