ما بقی فیلدها | ،،،،Verification،،Writing testbenches, functional verification of HDL models | ||||||
عنوان و نام پديدآور | #Writing testbenches using System Verilog #by Janick Bergeron{205},New York Springer #c2006{218},#xxvi, 412 p. : ill. , 25 cm{335},This book presents the same concepts as the second edition of Writing testbenches, functional verification of HDL models, but uses System Verilog as the sole implementation vehicle. The languages used in the second edition are still available{1255},Computer hardware description languages Integrated circuits | ||||||
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