/ edited by Shuvra S. Bhattacharyya, Ed F. Deprettere, JooAش?rgen Teich
خط فهرست نويسي و خط اصلي شناسه
fa
وضعیت نشر و پخش و غیره
محل نشرو پخش و غیره
New York
نام ناشر، پخش کننده و غيره
: Marcel Dekker,
تاریخ نشرو بخش و غیره
, c2004.
مشخصات ظاهری
نام خاص و کميت اثر
xv, 261 p. , ill. , 24 cm.
فروست
عنوان فروست
(Signal processing and communications
مشخصه جلد
; 20)
یادداشتهای مربوط به نشر، بخش و غیره
متن يادداشت
Electronic
یادداشتهای مربوط به کتابنامه ، واژه نامه و نمایه های داخل اثر
متن يادداشت
Includes bibliographical references and index.
یادداشتهای مربوط به مندرجات
متن يادداشت
7. Automatic Synthesis of Efficient Interfaces for Compiled Regular Architectures / Steven Derrien, Anne-Claire Guillou, Patrice Quinton, Tanguy Risset and Charles Wagner -- 8. Goal-Driven Reconfiguration of Polymorphous Architectures / Sumit Lohani and Shuvra S. Bhattacharyya -- 9. Realizations of the Extended Linearization Model / Alexandru Turjan, Bart Kienhuis and Ed F. Deprettere -- 10. Communication Services for Networks on Chip / Andrei Radulescu and Kees Goossens -- 11. Single-Chip Multiprocessing for Consumer Electronics / Paul Stravers and Jan Hoogerbugge -- 12. Future Directions of Programmable and Reconfigurable Embedded Processors / Stephan Wong, Stamatis Vassiliadis and Sorin Cotofana.
متن يادداشت
1. Automatic VHDL Model Generation of Parameterized FIR Filters / E. George Walters III, John Glossner and Michael J. Schulte -- 2. An LUT-Based High Level Synthesis Framework for Reconfigurable Architectures / Loic Lagadec, Bernard Pottier and Oscar Villellas-Guillen -- 3. Highly Efficient Scalable Parallel-Pipelined Architectures for Discrete Wavelet Transforms / David Guevorkian, Petri Liuha, Aki Launiainen and Ville Lappalainen -- 4. Stride Permutation Access in Interleaved Memory Systems / Jarmo Takala and Tuomas Jarvinen -- 5. On Modeling Intra-Task Parallelism in Task-Level Parallel Embedded Systems / Andy D. Pimentel, Frank P. Terpstra, Simon Polstra and Joe E. Coffland -- 6. Energy Estimation and Optimization for Piecewise Regular Processor Arrays / Frank Hannig and Jurgen Teich --