Built-in self test logic for a histogrammer memory chip
نام عام مواد
[Thesis]
نام نخستين پديدآور
A. A. Hamzah
وضعیت نشر و پخش و غیره
نام ناشر، پخش کننده و غيره
King Fahd University of Petroleum and Minerals (Saudi Arabia)
تاریخ نشرو بخش و غیره
1993
مشخصات ظاهری
نام خاص و کميت اثر
94
یادداشتهای مربوط به پایان نامه ها
جزئيات پايان نامه و نوع درجه آن
M.S.
کسي که مدرک را اعطا کرده
King Fahd University of Petroleum and Minerals (Saudi Arabia)
امتياز متن
1993
یادداشتهای مربوط به خلاصه یا چکیده
متن يادداشت
Memories, being an important part of most digital systems, should be properly tested. The testing time of these memories is a major concern since its cost constitutes a large percentage of the total cost. Histogrammer memory chips (HRAMs) are commonly used in digital image processing and also widely used for on-line sorting of data in nuclear physics experiments and in medical imaging systems. This research investigates the testability problem of a histogrammer memory chip (HRAM) being designed at KFUPM. A general fault model for the HRAM is adopted and new design for testability features are identified. Efficient O() test procedures for both the memory array and decoders of the KRAM are described (n is the number of memory cells). The testability features area overhead is only O(log n) as compared to O() for previous approaches. Random Built-In Self Test (BIST) implementation of the array and decoder test algorithms is described in detail.
موضوع (اسم عام یاعبارت اسمی عام)
موضوع مستند نشده
Applied sciences
موضوع مستند نشده
Computer science
موضوع مستند نشده
Electrical engineering
نام شخص به منزله سر شناسه - (مسئولیت معنوی درجه اول )