Current-Mode Clocking and Synthesis Considering Low-Power and Skew
General Material Designation
[Thesis]
First Statement of Responsibility
Riadul Islam
Subsequent Statement of Responsibility
Guthaus, Matthew R.
.PUBLICATION, DISTRIBUTION, ETC
Name of Publisher, Distributor, etc.
University of California, Santa Cruz
Date of Publication, Distribution, etc.
2017
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
113
GENERAL NOTES
Text of Note
Committee members: Pedrotti, Ken; Renau, Jose
NOTES PERTAINING TO PUBLICATION, DISTRIBUTION, ETC.
Text of Note
Place of publication: United States, Ann Arbor; ISBN=978-0-355-33349-7
DISSERTATION (THESIS) NOTE
Dissertation or thesis details and type of degree
Ph.D.
Discipline of degree
Computer Engineering
Body granting the degree
University of California, Santa Cruz
Text preceding or following the note
2017
SUMMARY OR ABSTRACT
Text of Note
Over the past decade, power associated with the Clock Distribution Network (CDN) has played an increasingly important role in the global integrated circuit industry. Since Complementary Metal Oxide Semiconductor (CMOS) technology continues to shrink, new physical phenomena are added to device/transistor behaviour. However, less attention has been given to add more features to the interconnect materials.
TOPICAL NAME USED AS SUBJECT
Computer Engineering; Electrical engineering
UNCONTROLLED SUBJECT TERMS
Subject Term
Applied sciences;Clock Distribution Network;Complementary Metal Oxide Semiconductor