عنوان

Digital subsampling phase lock techniques for frequency synthesis and polar transmission /

شابک

3030109577

شابک

3030109585

شابک

3030109593

شابک

9783030109578

شابک

9783030109585

شابک

9783030109592

شابک اشتباه

9783030109578

عنوان اصلي

Digital subsampling phase lock techniques for frequency synthesis and polar transmission /

نام عام مواد

[Book]

نام نخستين پديدآور

Nereo Markulic, Kuba Raczkowski, Jan Craninckx, Piet Wambacq.

محل نشرو پخش و غیره

Cham, Switzerland :

نام ناشر، پخش کننده و غيره

Springer,

تاریخ نشرو بخش و غیره

2019.

نام خاص و کميت اثر

1 online resource (xxiii, 138 pages) :

ساير جزييات

illustrations (some color)

عنوان فروست

Analog circuits and signal processing,

شاپا ي ISSN فروست

1872-082X

متن يادداشت

Includes bibliographical references and index.

متن يادداشت

Intro; Preface; Contents; Nomenclature; List of Figures; List of Tables; 1 Introduction; 1.1 A Transceiver with a Local Oscillator (LO) in Its Core; 1.1.1 A Cartesian Transceiver; 1.1.2 A Polar Transmitter; 1.2 A Phase-Locked Loop (PLL) as an LO; 1.2.1 From an Analog to a Mixed-Signal and Digital PLL; 1.2.2 Small Signal Model of a PLL; 1.2.3 Phase Noise in PLLs; 1.3 Motivation and Research Objectives; 1.3.1 A Subsampling PLL; 1.3.2 Objectives of the Book; 1.4 Book Outline; References; 2 A Digital-to-Time-Converter-Based Subsampling PLL for Fractional Synthesis; 2.1 Introduction

متن يادداشت

2.2 Fractional-N Operation of a Subsampling PLL2.2.1 Time-Domain Analysis of a Subsampling PLL; 2.2.2 Enhancement of a Subsampling PLL to Enable Fraction-N Mode Operation; 2.2.3 Digital Modulator for the Fractional-N Subsampling PLL; 2.3 Implementation Limitations and Their Mitigation; 2.3.1 DTC Quantization; 2.3.2 A DTC Versus a TDC in Fractional Frequency Synthesis; 2.3.3 DTC Offset and Gain Error; 2.3.4 DTC Nonlinearity; 2.3.5 DTC Phase Noise; 2.4 Circuit Implementation; 2.4.1 Implementation of the Subsampling Loop; 2.4.2 Implementation of the Digital-to-Time Converter

متن يادداشت

2.4.2.1 Delay Control Block2.4.2.2 Comparator and Output Buffer; 2.4.2.3 Regulated Supply; 2.4.3 Implementation of the VCO; 2.4.4 Implementation of the Frequency-Acquisition Loop; 2.5 Experimental Results; 2.5.1 Measured Phase Noise Performance; 2.5.2 Remaining Fractional Spur; 2.5.3 DTC-Related Measurements; 2.5.4 Performance Summary and Comparison to the State of the Art; 2.6 Conclusion; References; 3 A Background-Calibrated Subsampling PLL for Phase/Frequency Modulation; 3.1 Introduction; 3.1.1 PLL-Based Phase Modulation; 3.1.2 A DTC-Based Fractional-N Subsampling PLL for Phase Modulation

متن يادداشت

3.2 A Self-Calibrated DTC-Based FNSSPLL3.2.1 Basic Operation of the FNSSPLL; 3.2.2 The Random-Jump for DTC Quantization Noise Randomization; 3.2.3 The Random-Jump for DTC Nonlinearity Randomization; 3.2.4 Self-Calibration of the DTC Nonlinearity; 3.2.5 Extraction of the Current's Sign and Comparator Offset Compensation; 3.3 Two-Point Phase Modulator Based on the FNSSPLL; 3.3.1 Modulating fDAC INL Calibration; 3.3.2 Delay-Spread Cancellation; 3.4 Experimental Results; 3.5 Conclusion; References; 4 A Background-Calibrated Digital Subsampling Polar Transmitter; 4.1 Introduction

متن يادداشت

4.2 System Overview4.2.1 A Digital Fractional-N Subsampling PLL; 4.2.2 Phase/Frequency and Amplitude Modulation; 4.2.3 Prototype Targets and Building Block's Specifications; 4.3 Digital Linearization Techniques; 4.3.1 PM-to-PM Background Calibration; 4.3.2 AM-to-AM Distortion Background Calibration; 4.3.2.1 Background GPD Estimation; 4.3.2.2 Background DPA INL Cancellation; 4.3.3 Phase-Domain Matlab Simulations of Background Calibration; 4.4 Built-in AM-to-PM Distortion Filtering; 4.5 Analog Building Blocks; 4.5.1 Subsampling Path: From Sampler to Code; 4.5.1.1 Sampler

بدون عنوان

0

بدون عنوان

8

بدون عنوان

8

بدون عنوان

8

بدون عنوان

8

متن يادداشت

This book explains concepts behind fractional subsampling-based frequency synthesis that is re-shaping today's art in the field of low-noise LO generation. It covers advanced material, giving clear guidance for development of background-calibrated environments capable of spur-free synthesis and wideband phase modulation. It further expands the concepts into the field of subsampling polar transmission, where the newly developed architecture enables unprecedented spectral efficiency levels, unquestionably required by the upcoming generation of wireless standards. Guides development of DTC-based Fractional-N Subsampling PLL and Subsampling Polar Transmitters, covering material from fundamental theory, over system level considerations to building block IC implementation; Describes a fully background-calibrated environment that can used in general context of fractional frequency synthesis and/or phase/frequency modulation; Presents three IC implementations, showing system level analysis, design methodology, circuit details and measurement results.

منبع سفارش / آدرس اشتراک

Springer Nature

شماره انبار

com.springer.onix.9783030109585

شماره استاندارد بين المللي کتاب و موسيقي

9783030109578

شماره استاندارد بين المللي کتاب و موسيقي

9783030109592

موضوع مستند نشده

Integrated circuits.

موضوع مستند نشده

Phase-locked loops.

موضوع مستند نشده

Integrated circuits.

موضوع مستند نشده

Phase-locked loops.

موضوع مستند نشده

TEC008010

موضوع مستند نشده

TJFC

موضوع مستند نشده

TJFC

شماره

ويراست

شماره رده

مستند نام اشخاص تاييد نشده

Markulic, Nereo

مستند نام اشخاص تاييد نشده

Craninckx, J., (Jan)

مستند نام اشخاص تاييد نشده

Raczkowski, Kuba

مستند نام اشخاص تاييد نشده

Wambacq, Piet

تاريخ عمليات

20200823082632.0

قواعد فهرست نويسي ( بخش توصيفي )

pn

نام الکترونيکي

نوع ماده

[Book]

تكميل شده

Y