عنوان
پدید آورنده
موضوع
رده
TK 7867 .S46F6
TK
7867
.
S46F6
کتابخانه
محل استقرار
TITLE AND STATEMENT OF RESPONSIBILITY
Title Proper
Formal verification : an essential toolkit for modern VLSI design
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Amsterdam
Name of Publisher, Distributor, etc.
Elsevier/Morgan Kaufmann
Date of Publication, Distribution, etc.
c2015
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
xvii, 353 p.: ill.
GENERAL NOTES
Text of Note
Includes bibliographies
Text of Note
ISBN: 9780128007273
NOTES PERTAINING TO TITLE AND STATEMENT OF RESPONSIBILITY
Text of Note
Erik Seligman, Tom Schubert, M. V. Achutha Kiran Kumar
ORIGINAL VERSION NOTE
Text of Note
1
TOPICAL NAME USED AS SUBJECT
Entry Element
Testing ، Electronic circuits
Entry Element
Design and construction ، Integrated circuits -- Very large scale integration
Entry Element
، Verilog )Computer hardware description language(
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
7867
.
S46F6
OTHER CLASS NUMBERS
Class number
NO
PERSONAL NAME - PRIMARY RESPONSIBILITY
Entry Element
Seligman, Erik
Relator Code
AU
AU Schubert, E. Thomas, 1959-
AU Kumar, M. V. Achutha Kiran
TI
