عنوان
پدید آورنده
موضوع
رده
TK 7885.7 .M4 2014
TK
7885
.
7
.
M4
2014
کتابخانه
محل استقرار
LANGUAGE OF THE ITEM
.Language of Text, Soundtrack etc
English
TITLE AND STATEMENT OF RESPONSIBILITY
Volume Designation
author
Title Proper
Systemverilog assertions and functional coverage: guide to language, methodology and applications
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
New York
Name of Publisher, Distributor, etc.
Springer
Date of Publication, Distribution, etc.
c2014
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
xxxiii, 356 p.: illus.; 24 cm
GENERAL NOTES
Text of Note
Includes index
NOTES PERTAINING TO TITLE AND STATEMENT OF RESPONSIBILITY
Text of Note
Ashok B. Mehta
ORIGINAL VERSION NOTE
Text of Note
1
TOPICAL NAME USED AS SUBJECT
Entry Element
، Verilog )Computer hardware description language(
Entry Element
، Electronic digital computers - Design and construction
Entry Element
، Integrated circuits - Verification
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
7885
.
7
.
M4
2014
PERSONAL NAME - PRIMARY RESPONSIBILITY
Entry Element
Mehta, Ashok B.
Relator Code
AU
TI
