عنوان
پدید آورنده
موضوع
رده
TK 7885.7 .N38
TK
7885
.
7
.
N38
کتابخانه
محل استقرار
TITLE AND STATEMENT OF RESPONSIBILITY
Title Proper
VHDL :modular design and synthesis of cores and systems
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
New York
Name of Publisher, Distributor, etc.
McGraw-Hill
Date of Publication, Distribution, etc.
c2007
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
xviii, 531 p. : ill. ; 24 cm. +
GENERAL NOTES
Text of Note
2nd ed. has subtitle: analysis and modeling of digital systems
Text of Note
Includes bibliographical references and index
NOTES PERTAINING TO TITLE AND STATEMENT OF RESPONSIBILITY
Text of Note
Zainalabedin Navabi
ORIGINAL VERSION NOTE
Text of Note
1
CONTENTS NOTE
Text of Note
Digital system design automation with VHDL -- RTL design with VHDL -- VHDL constructs for structure and hierarchy descriptions -- Concurrent constructs for RT level descriptions -- Sequential constructs for RT level descriptions -- VHDL language utilities and packages -- VHDL signal model -- Hardware cores and models -- Core design test and testability -- Design, test and application of a processor core
TOPICAL NAME USED AS SUBJECT
Entry Element
، VHDL )Computer hardware description language(
Entry Element
Design and construction Data processing ، Digital integrated circuits
DEWEY DECIMAL CLASSIFICATION
Number
621
.
39/2
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
7885
.
7
.
N38
PERSONAL NAME - PRIMARY RESPONSIBILITY
Entry Element
Navabi, Zainalabedin.
Relator Code
AU
TI
