عنوان

Principles of verifiable RTL design :a functional coding style supporting verification processes in Verilog

پدید آورنده

Bening, Lionel

موضوع

Very large scale integration Computer-aided design ، Integrated circuits,، Verilog )Computer hardware description language(,Computer-aided design ، Electronic digital computers

رده

TK

7874
.
75
.
B47

کتابخانه

Central Library of Hamedan University of Technology

محل استقرار

استان: Hamedan ـ شهر: Hamedan

تماس با کتابخانه : 38411100-081

TITLE AND STATEMENT OF RESPONSIBILITY

Title Proper

Principles of verifiable RTL design :a functional coding style supporting verification processes in Verilog

.PUBLICATION, DISTRIBUTION, ETC

Place of Publication, Distribution, etc.

Boston

Name of Publisher, Distributor, etc.

Kluwer Academic Publishers

Date of Publication, Distribution, etc.

c2001

PHYSICAL DESCRIPTION

Specific Material Designation and Extent of Item

xxiii, 281 p. : ill. ; 26 cm.

GENERAL NOTES

Text of Note

Includes bibliographical references )p. ]247[-254( and index

NOTES PERTAINING TO TITLE AND STATEMENT OF RESPONSIBILITY

Text of Note

Lionel Bening and Harry Foster

ORIGINAL VERSION NOTE

Text of Note

TOPICAL NAME USED AS SUBJECT

Entry Element

Very large scale integration Computer-aided design ، Integrated circuits

Entry Element

، Verilog )Computer hardware description language(

Entry Element

Computer-aided design ، Electronic digital computers

DEWEY DECIMAL CLASSIFICATION

Number

621

39/5

LIBRARY OF CONGRESS CLASSIFICATION

Class number

7874

B47

PERSONAL NAME - PRIMARY RESPONSIBILITY

Dates

9391-

Entry Element

Bening, Lionel

Relator Code

AU Foster, Harry 1956-

عنوان Principles of verifiable RTL design :a functional coding style supporting verification processes in Verilog

پدید آورنده Bening, Lionel

موضوع Very large scale integration Computer-aided design ، Integrated circuits,، Verilog )Computer hardware description language(,Computer-aided design ، Electronic digital computers

رده TK 7874.75 .B47

کتابخانه Central Library of Hamedan University of Technology

محل استقرار استان: Hamedan ـ شهر: Hamedan

TITLE AND STATEMENT OF RESPONSIBILITY

.PUBLICATION, DISTRIBUTION, ETC

PHYSICAL DESCRIPTION

GENERAL NOTES

NOTES PERTAINING TO TITLE AND STATEMENT OF RESPONSIBILITY

ORIGINAL VERSION NOTE

TOPICAL NAME USED AS SUBJECT

DEWEY DECIMAL CLASSIFICATION

LIBRARY OF CONGRESS CLASSIFICATION

PERSONAL NAME - PRIMARY RESPONSIBILITY

عنوان

Principles of verifiable RTL design :a functional coding style supporting verification processes in Verilog

پدید آورنده

Bening, Lionel

موضوع

Very large scale integration Computer-aided design ، Integrated circuits,، Verilog )Computer hardware description language(,Computer-aided design ، Electronic digital computers

رده

TK

7874
.
75
.
B47

کتابخانه

Central Library of Hamedan University of Technology

محل استقرار

استان: Hamedan ـ شهر: Hamedan