NOTES PERTAINING TO PUBLICATION, DISTRIBUTION, ETC.
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INTERNAL BIBLIOGRAPHIES/INDEXES NOTE
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Includes bibliographical references and index.
CONTENTS NOTE
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Part 1. Placement -- Device-Level Topological Placement with Symmetry Constraints -- Hierarchical Placement with Layout Constraints -- Deterministic Analog Placement by Enhanced Shape Functions Part 2. Routing -- Routing Analog Circuits Part 3. Layout in the Design Flow -- Analog Layout Retargeting -- Closing the Gap Between Electrical and Physical Design: The Layout-Aware Solution -- Constraint-Driven Design Methodology: A Path to Analog Design Automation.