INTERNATIONAL STANDARD BOOK NUMBER
(Number (ISBN
0780334167
NATIONAL BIBLIOGRAPHY NUMBER
Country Code
IR
Number
EN-56394
LANGUAGE OF THE ITEM
.Language of Text, Soundtrack etc
انگلیسی
COUNTRY OF PUBLICATION OR PRODUCTlON
Country of publication
IR
TITLE AND STATEMENT OF RESPONSIBILITY
Title Proper
CMOS circuit design, layout, and simulation
General Material Designation
[Book]
First Statement of Responsibility
/ R. Jacob Baker, Harry W. Li, and David E. Boyce
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
New York
Name of Publisher, Distributor, etc.
: IEEE Press,
Date of Publication, Distribution, etc.
, c1998.
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
xxiv, 902 p. , ill. , 24 cm.
SERIES
Series Title
(IEEE Press series on microelectronic systems)
GENERAL NOTES
Text of Note
"IEEE Circuits & Systems Society, sponsor, IEEE Solid-State Circuits Society, sponsor."
NOTES PERTAINING TO PUBLICATION, DISTRIBUTION, ETC.
Text of Note
Electronic
INTERNAL BIBLIOGRAPHIES/INDEXES NOTE
Text of Note
Includes bibliographical references and index.
CONTENTS NOTE
Text of Note
Ch. 21. References. Ch. 22. Amplifiers. Ch. 23. Feedback Amplifiers. Ch. 24. Differential Amplifiers. Ch. 25. Operational Amplifiers -- Pt. IV. Mixed-Signal Circuits. Ch. 26. Nonlinear Analog Circuits. Ch. 27. Dynamic Analog Circuits. Ch. 28. Data Converter Fundamentals. Ch. 29. Data Converter Architectures. App. A. Orbit's CN20 Process -- App. B. MOSIS Scalable Design Rules -- App. C. HP's CMOS14TB.
Text of Note
Pt. I. CMOS Fundamentals. Ch. 1. Introduction. Ch. 2. The Well. Ch. 3. The Metal Layers. Ch. 4. The Active and Poly Layers. Ch. 5. The MOSFET. Ch. 6. The BSIM SPICE Model. Ch. 7. CMOS Passive Elements. Ch. 8. Design Verification with LASICKT. Ch. 9. Analog MOSFET Models. Ch. 10. The Digital Model -- Pt. II. CMOS Digital Circuits. Ch. 11. The Inverter. Ch. 12. Static Logic Gates. Ch. 13. The TG and Flip-Flops. Ch. 14. Dynamic Logic Gates. Ch. 15. VLSI Layout. Ch. 16. BiCMOS Logic Gates. Ch. 17. Memory Circuits. Ch. 18. Special-Purpose Digital Circuits. Ch. 19. Digital Phase-Locked Loops -- Pt. III. CMOS Analog Circuits. Ch. 20. Current Sources and Sinks.
TOPICAL NAME USED AS SUBJECT
Metal oxide semiconductors, Complementary , Design and construction
Integrated circuits , Design and construction
Metal oxide semiconductor field-effect transistors
LIBRARY OF CONGRESS CLASSIFICATION
Class number
E-BOOK
PERSONAL NAME - PRIMARY RESPONSIBILITY
Baker, R. Jacob, 1964-
PERSONAL NAME - SECONDARY RESPONSIBILITY
Li, Harry W., 1960-
Boyce, David E., 1940-
Institute of Electrical and Electronics Engineers
ORIGINATING SOURCE
Country
ایران
ELECTRONIC LOCATION AND ACCESS
Host name
078033440X.pdf
Access number
عادی
Compression information
عادی
Date and Hour of Consultation and Access
078033440X.pdf
Electronic Format Type
متن
old catalog
e
BL
1
a
Y
