عنوان
پدید آورنده
موضوع
رده
TK 7871.99 .M44 S37 1993
TK
7871
.
99
.
M44
S37
1993
کتابخانه
محل استقرار
CE
TITLE AND STATEMENT OF RESPONSIBILITY
First Statement of Responsibility
Sapatnekar, Sachin S.
Title Proper
Design automation for timing-driven layout synthesis
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Boston
Name of Publisher, Distributor, etc.
Kluwer Academic Publishers
Date of Publication, Distribution, etc.
1993
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
xx, 269 p. : ill
SERIES
Series Title
VLSI, computer aarchitecture and digital signal processing
GENERAL NOTES
Text of Note
Includes bibliographical references )p. 247-266( and index
TOPICAL NAME USED AS SUBJECT
Entry Element
Metal oxide semiconductors, Complementary - Design and construction - Data processing
Entry Element
Integrated circuits - Very large scale integration - Design and construction - Data processing
Entry Element
Computer-aided design
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
Book number
7871
.
99
Classification Record Number
.
M44
S37
1993
PERSONAL NAME - PRIMARY RESPONSIBILITY
Relator Code
AU
Dates
1967-
Entry Element
by Sachin S. Sapatnekar, Sung-Mo )Steve( Kang
LOCATION AND CALL NUMBER
Shelving Form of Title, Author, Author/Title
English
