A parallel testing algorithm for pattern sensitive faults in random access memory
General Material Designation
[Thesis]
First Statement of Responsibility
S. Lu
Subsequent Statement of Responsibility
M. Ashtijou
.PUBLICATION, DISTRIBUTION, ETC
Name of Publisher, Distributor, etc.
Texas A&M University - Kingsville
Date of Publication, Distribution, etc.
1994
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
154
DISSERTATION (THESIS) NOTE
Dissertation or thesis details and type of degree
M.S.
Body granting the degree
Texas A&M University - Kingsville
Text preceding or following the note
1994
SUMMARY OR ABSTRACT
Text of Note
A pattern sensitive fault recognition algorithm (PSFRA) is presented that not only detects and locates the neighborhood pattern sensitive faults (NPSF) but also it recognizes the types of the fault. A parallel testing structure for NPSF in Random Access Memory (RAM) has been developed in (1) to reduce overall test time and cost. It is designed for a broad class of pattern-sensitive faults and is significantly more efficient than previous approaches. The algorithm is modified to provide a fault type recognition capability that helps in differentiating between active, passive, and static NPSF for Type-1 and Type-2 neighborhood. The PSFRA needs 321 N write operations and 480 N read operations for Type-1 neighborhood, and it needs 129 N write operations and 192 N read operations for Type-2 neighborhood (N is the memory size). The recognition of fault is in expense of more test time and it is still more efficient than sequential algorithms.