عنوان

Modelling and measurement of the MOSFET output conductance in saturation

Number

TLpq304043451

.Language of Text, Soundtrack etc

انگلیسی

Title Proper

Modelling and measurement of the MOSFET output conductance in saturation

General Material Designation

[Thesis]

First Statement of Responsibility

M. F. Akram

Subsequent Statement of Responsibility

J. D. Plummer

Name of Publisher, Distributor, etc.

Stanford University

Date of Publication, Distribution, etc.

1992

Specific Material Designation and Extent of Item

138

Dissertation or thesis details and type of degree

Ph.D.

Body granting the degree

Stanford University

Text preceding or following the note

1992

Text of Note

The output conductance of a MOSFET in saturation is an extremely important parameter in the design of analog integrated circuits. Most analytic treatments of the MOSFET in saturation are two-section models which assume that the carriers have reached velocity saturation when entering the drain-controlled section. With modern processes, devices, and circuits optimized for 5 volt operation, a volt or two of bias is a significant fraction of the total supply voltage. For the normal range of channel lengths encountered in analog integrated circuits, velocity saturation conditions may not then be present at these low levels of bias, and so these models become inapplicable. This work discusses the inadequacy of the two-section models in properly determining the drain saturation potential as well as the output conductance in saturation and develops a new model that overcomes these difficulties and is also applicable when the device is not operating under velocity saturation conditions. The new model achieves this by including the diffusion component of the drain current and by modelling the MOSFET channel as a three-section region. In connection with the modelling effort, a new technique for measuring very low output conductance was developed and is also presented. This technique provides precision measurements even in the presence of stray capacitances whose susceptance is many times the conductance being measured. This thesis also describes a language called SAL that was developed to allow the introduction of such programming language constructs as if-then-else statements, for-loops, and function calls into programs written for batch-mode simulators. This facilitates automating the various simulators used in the development of modem processes, devices, and circuits. Thus comprehensive simulations, all under program control and with minimal human intervention can be performed. A program written in SAL was used to optimize the open circuit voltage gain usdA\sb{\upsilon o}usd of a MOSFET with respect to the gate oxide thickness and the drain junction depth usdx\sb{j}usd. Both these parameters influence the saturation output conductance and hence usdA\sb{\upsilon o}usd of a MOSFET. This study yielded the unexpected result that over a significant range of drain current, usdx\sb{j}usd has very little influence on usdA\sb{\upsilon o}usd.

analog integrated circuits

Applied sciences

Electrical engineering

J. D. Plummer

M. F. Akram

Electronic name

p

[Thesis]

276903

a

Y