optimization algorithms for memory architecture aware compilation /
First Statement of Responsibility
by Lars Wehmeyer and Peter Marwedel.
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Dordrecht :
Name of Publisher, Distributor, etc.
Springer,
Date of Publication, Distribution, etc.
2006.
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
1 online resource (xi, 257 pages) :
Other Physical Details
illustrations
INTERNAL BIBLIOGRAPHIES/INDEXES NOTE
Text of Note
Includes bibliographical references and index.
CONTENTS NOTE
Text of Note
Abstract; Introduction; Models and Tools; Scratchpad Memory Optimizations; Main Memory Optimizations; Register File Optimization; Summary; Future Work.
0
SUMMARY OR ABSTRACT
Text of Note
Presents techniques for designing fast, energy-efficient and timing predictable memory systems. This book covers algorithms to exploit the power down modes of main memories in SDRAM technology, as well as the execute-in-place feature of Flash memories. It considers the impact of the register file, which is also part of the memory hierarchy.
SYSTEM REQUIREMENTS NOTE (ELECTRONIC RESOURCES)
Text of Note
Master and use copy. Digital master created according to Benchmark for Faithful Digital Reproductions of Monographs and Serials, Version 1. Digital Library Federation, December 2002.