عنوان
پدید آورنده
موضوع
رده
TK7874
TK7874
کتابخانه
محل استقرار
INTERNATIONAL STANDARD BOOK NUMBER
(Number (ISBN
331976294X
(Number (ISBN
9783319762944
Erroneous ISBN
3319762931
Erroneous ISBN
9783319762937
TITLE AND STATEMENT OF RESPONSIBILITY
Title Proper
Physical design and mask synthesis for directed self-assembly lithography /
General Material Designation
[Book]
First Statement of Responsibility
Seongbo Shim, Youngsoo Shin.
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Cham, Switzerland :
Name of Publisher, Distributor, etc.
Springer,
Date of Publication, Distribution, etc.
2018.
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
1 online resource (xiv, 138 pages) :
Other Physical Details
illustrations (some color)
SERIES
Series Title
NanoScience and technology,
ISSN of Series
1434-4904
INTERNAL BIBLIOGRAPHIES/INDEXES NOTE
Text of Note
Includes bibliographical references and index.
CONTENTS NOTE
Text of Note
Intro; Preface; Contents; Acronyms; 1. Introduction; 1.1. Optical Lithography; 1.2. Next Generation Lithography Technologies; 1.2.1. Extreme Ultraviolet Lithography (EUVL); 1.2.2. Electron Beam Lithography (EBL); 1.2.3. Nanoimprint Lithography (NIL); 1.3. Directed Self-Assembly Lithography (DSAL); 1.4. Overview of the Book; References; Part I. Physical Design Optimizations; 2. DSAL Manufacturability; 2.1. DSA Defect; 2.1.1. DSAL for IC Design and Fabrication; 2.1.2. Lithography-Induced DSA Defect; 2.2. DSA Defect Probability; 2.2.1. Definition; 2.2.2. Defect Probability Computation.
Text of Note
2.3. Experimental Observations; 2.4. Summary; References; 3. Placement Optimization for DSAL; 3.1. Introduction; 3.2. Defect Probability of Cell Pair; 3.3. Post-Placement Optimization; 3.3.1. Cell Flipping; 3.3.2. Cell Swapping and Flipping; 3.4. Automatic Placement; 3.4.1. Implementation of Placer; 3.4.2. Considerations on Analytical Placer; 3.5. Experiments; 3.6. Summary; References; 4. Post-Placement Optimization for MP-DSAL Compliant Layout; 4.1. Introduction; 4.2. MP-DSAL Decomposition; 4.3. Post-Placement Optimization; 4.3.1. MP-DSAL Decomposition of Standard Cells.
Text of Note
4.3.2. Placement Optimization for Cell Row; 4.3.3. Considerations of Interrow Conflict; 4.4. Experiments; 4.5. Summary; References; 5. Redundant Via Insertion for DSAL; 5.1. Introduction; 5.2. Preliminaries; 5.2.1. Defect Probability of Via Cluster; 5.2.2. Basic Redundant Via Insertion; 5.3. DSAL Redundant Via Insertion Algorithm; 5.3.1. Graph Modeling; 5.3.2. Heuristic Insertion Algorithm; 5.4. Experiments; 5.5. Summary; References; 6. Redundant Via Insertion for MP-DSAL; 6.1. Introduction; 6.2. Simultaneous Optimization of Redundant Via and Via Cluster; 6.2.1. ILP Formulation; 6.2.2. Graph-Based Heuristic.
Text of Note
6.3. Experiments; 6.4. Summary; References; Part II. Mask Synthesis and Optimizations; 7. DSAL Mask Synthesis; 7.1. Introduction; 7.2. Inverse DSA; 7.2.1. Numerical Results; 7.3. Inverse Lithography; 7.3.1. Approximation of Cost Gradient; 7.3.2. Evaluation; 7.4. Mask Design with Process Variations; 7.4.1. Inverse DSA and Inverse Lithography; 7.4.2. Insertion of DSA-Aware Assist Feature; 7.4.3. Assessment; 7.5. Summary; References; 8. Verification of Guide Patterns; 8.1. Introduction; 8.2. Test GPs; 8.2.1. Preparation of GPs; 8.2.2. Evaluation of GP Coverage; 8.3. Preparing a GP Using Geometric Parameters.
Text of Note
8.3.1. Geometric Parameters; 8.3.2. Principal Component Analysis; 8.3.3. Experimental Observations; 8.4. Constructing a Verification Function; 8.5. Experimental Assessment; 8.5.1. Choice of Parameters; 8.5.2. Parameter Reduction; 8.5.3. Comparison of GP Verification Methods; 8.5.4. A Global Verification Function; 8.6. Conclusions; References; 9. Cut Optimization; 9.1. Introduction; 9.2. Preliminaries; 9.2.1. Critical Cut Distances in MP-DSAL; 9.2.2. Wire Extension: Impact on Circuit Timing; 9.3. MP-DSAL Cut Optimization; 9.3.1. ILP Formulation; 9.3.2. Heuristic Algorithm; 9.4. Experiments; 9.5. Conclusion.
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SUMMARY OR ABSTRACT
Text of Note
This book discusses physical design and mask synthesis of directed self-assembly lithography (DSAL). It covers the basic background of DSAL technology, physical design optimizations such as placement and redundant via insertion, and DSAL mask synthesis as well as its verification. Directed self-assembly lithography (DSAL) is a highly promising patterning solution in sub-7nm technology.
ACQUISITION INFORMATION NOTE
Source for Acquisition/Subscription Address
Springer Nature
Stock Number
com.springer.onix.9783319762944
OTHER EDITION IN ANOTHER MEDIUM
Title
Physical design and mask synthesis for directed self-assembly lithography.
International Standard Book Number
9783319762937
TOPICAL NAME USED AS SUBJECT
Integrated circuits-- Design and construction.
Integrated circuits-- Masks.
Lithography.
Self-assembly (Chemistry)
Circuits & components.
Electronic devices & materials.
Integrated circuits-- Design and construction.
Integrated circuits-- Masks.
Lithography.
Nanotechnology.
Precision instruments manufacture.
Self-assembly (Chemistry)
Semi-conductors & super-conductors.
TECHNOLOGY & ENGINEERING-- Mechanical.
(SUBJECT CATEGORY (Provisional
TBN
TEC-- 009070
DEWEY DECIMAL CLASSIFICATION
Number
621
.
3815
Edition
23
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK7874
PERSONAL NAME - PRIMARY RESPONSIBILITY
Shim, Seongbo
PERSONAL NAME - ALTERNATIVE RESPONSIBILITY
Shin, Youngsoo
ORIGINATING SOURCE
Date of Transaction
20200823110826.0
Cataloguing Rules (Descriptive Conventions))
pn
ELECTRONIC LOCATION AND ACCESS
Electronic name
مطالعه متن کتاب [Book]
Y
