Heterogeneous Integration of III-V Semiconductor Compounds on Silicon for Functional Photonic Circuits
General Material Designation
[Thesis]
General Material Designation
[Thesis]
General Material Designation
[Thesis]
General Material Designation
[Thesis]
First Statement of Responsibility
Stanley Cheung
Subsequent Statement of Responsibility
Yoo, S. J. Ben
.PUBLICATION, DISTRIBUTION, ETC
Name of Publisher, Distributor, etc.
University of California, Davis
Date of Publication, Distribution, etc.
2014
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
222
GENERAL NOTES
Text of Note
Committee members: Hihath, Joshua; Islam, Saif M.; Yoo, S. J. B.
NOTES PERTAINING TO PUBLICATION, DISTRIBUTION, ETC.
Text of Note
Place of publication: United States, Ann Arbor; ISBN=978-1-321-60820-5
DISSERTATION (THESIS) NOTE
Dissertation or thesis details and type of degree
Ph.D.
Discipline of degree
Electrical and Computer Engineering
Body granting the degree
University of California, Davis
Text preceding or following the note
2014
SUMMARY OR ABSTRACT
Text of Note
There has been extensive research in realizing large-scale integration of silicon (Si) photonics for long-haul communications, high-throughput optical interconnects, and future high performance computing (HPC). The impetus for this research lies in the fact that the silicon-on-insulator (SOI) platform is fully compatible with CMOS technology which drives mature IC technology and allows for a convergence with large-scale integrated photonics. Recent advances in key components such as high-contrast, low-loss arrayed waveguide gratings/routers (AWG/AWGR), high speed optical modulators, germanium photo-detectors, and single-wavelength hybrid silicon laser sources have all paved a path towards realizing large chip-scale optical systems with various functionalities. Recently, the energy efficiency of these photonic components in an optical link have drawn strong attention with some projections indicating by 2020, the energy consumption of most components in 100-gigabit-per-second (Gbps) systems will be between a few pico-Joules (pJ) and sub-pJ per bit. Therefore, over the past few years, there has been keen interest in heterogeneous integration of III-V compounds with silicon to realize monolithic integration of efficient hybrid devices.