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عنوان
High-Level Synthesis for Real-Time Digital Signal Processing

پدید آورنده
by Jan Vanhoof, Karl Rompaey, Ivo Bolsens, Gert Goossens, Hugo Man.

موضوع
Computer engineering.,Computer-aided design.,Engineering.,Systems engineering.

رده

کتابخانه
Center and Library of Islamic Studies in European Languages

محل استقرار
استان: Qom ـ شهر: Qom

Center and Library of Islamic Studies in European Languages

تماس با کتابخانه : 32910706-025

INTERNATIONAL STANDARD BOOK NUMBER

(Number (ISBN
9781441951342
(Number (ISBN
9781475722222

NATIONAL BIBLIOGRAPHY NUMBER

Number
dltt

TITLE AND STATEMENT OF RESPONSIBILITY

Title Proper
High-Level Synthesis for Real-Time Digital Signal Processing
General Material Designation
[Book]
First Statement of Responsibility
by Jan Vanhoof, Karl Rompaey, Ivo Bolsens, Gert Goossens, Hugo Man.

.PUBLICATION, DISTRIBUTION, ETC

Place of Publication, Distribution, etc.
Boston, MA :
Name of Publisher, Distributor, etc.
Imprint: Springer,
Date of Publication, Distribution, etc.
1993.

SERIES

Series Title
Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing,
Volume Designation
216
ISSN of Series
0893-3405 ;

SUMMARY OR ABSTRACT

Text of Note
High-Level Synthesis for Real-Time Digital Signal Processing is a comprehensive reference work for researchers and practicing ASIC design engineers. It focuses on methods for compiling complex, low to medium throughput DSP system, and on the implementation of these methods in the CATHEDRAL-II compiler. The emergence of independent silicon foundries, the reduced price of silicon real estate and the shortened processing turn-around time bring silicon technology within reach of system houses. Even for low volumes, digital systems on application-specific integrated circuits (ASICs) are becoming an economically meaningful alternative for traditional boards with analogue and digital commodity chips. ASICs cover the application region where inefficiencies inherent to general-purpose components cannot be tolerated. However, full-custom handcrafted ASIC design is often not affordable in this competitive market. Long design times, a high development cost for a low production volume, the lack of silicon designers and the lack of suited design facilities are inherent difficulties to manual full-custom chip design. To overcome these drawbacks, complex systems have to be integrated in ASICs much faster and without losing too much efficiency in silicon area and operation speed compared to handcrafted chips. The gap between system design and silicon design can only be bridged by new design (CAD). The idea of a silicon compiler, translating a behavioural system specification directly into silicon, was born from the awareness that the ability to fabricate chips is indeed outrunning the ability to design them. At this moment, CAD is one order of magnitude behind schedule. Conceptual CAD is the keyword to mastering the design complexity in ASIC design and the topic of this book.

OTHER EDITION IN ANOTHER MEDIUM

International Standard Book Number
9781441951342

PIECE

Title
Springer eBooks

TOPICAL NAME USED AS SUBJECT

Computer engineering.
Computer-aided design.
Engineering.
Systems engineering.

PERSONAL NAME - PRIMARY RESPONSIBILITY

Vanhoof, Jan.

PERSONAL NAME - ALTERNATIVE RESPONSIBILITY

Bolsens, Ivo.
Goossens, Gert.
Man, Hugo.
Rompaey, Karl.

CORPORATE BODY NAME - ALTERNATIVE RESPONSIBILITY

SpringerLink (Online service)

ORIGINATING SOURCE

Date of Transaction
20190301083100.0

ELECTRONIC LOCATION AND ACCESS

Electronic name
 مطالعه متن کتاب 

[Book]

Y

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