عنوان

Computing with memory for energy-efficient robust systems /

(Number (ISBN

1461477972

(Number (ISBN

1461477980 (electronic bk.)

(Number (ISBN

9781461477976

(Number (ISBN

9781461477983 (electronic bk.)

Erroneous ISBN

9781461477976

Number

b431280

Title Proper

Computing with memory for energy-efficient robust systems /

General Material Designation

[Book]

First Statement of Responsibility

Somnath Paul, Swarup Bhunia

Specific Material Designation and Extent of Item

1 online resource (xiii, 210 pages) :

Other Physical Details

illustrations (some color)

Text of Note

Includes bibliographical references

Text of Note

Part I. Introduction -- Challenges in Computing for Nanoscale Technologies -- A Survey of Computing Architectures -- Motivation for a Memory-Based Computing Hardware -- Part II. Memory Based Computing -- Key Features of Memory-Based Computing -- Overview of Hardware and Software Architectures -- Application of Memory-Based Computing -- Part III. Hardware Framework -- A Memory Based Generic Reconfigurable Framework -- MAHA Hardware Architecture -- Part IV. Software Framework -- Application Analysis -- Application Mapping to MBC Hardware

0

Text of Note

This book analyzes energy and reliability as major challenges faced by designers of computing frameworks in the nanometer technology regime. The authors describe the existing solutions to address these challenges and then reveal a new reconfigurable computing platform, which leverages high-density nanoscale memory for both data storage and computation to maximize the energy-efficiency and reliability. The energy and reliability benefits of this new paradigm are illustrated and the design challenges are discussed. Various hardware and software aspects of this exciting computing paradigm are described, particularly with respect to hardware-software co-designed frameworks, where the hardware unit can be reconfigured to mimic diverse application behavior. Finally, the energy-efficiency of the paradigm described is compared with other, well-known reconfigurable computing platforms. Introduces new paradigm for hardware reconfigurable frameworks, which leverages dense memory array as a malleable resource, which can be used for information storage as well as computation; Merges spatial and temporal computing to minimize interconnect overhead and achieve better scalability compared to state-of-the-art reconfigurable computing platforms; Enables efficient mapping of diverse data-intensive applications from domains of signal processing, multimedia and security applications

Computer engineering

Computers-- Energy consumption

Nanoelectromechanical systems

Circuits and Systems

Electronics and Microelectronics, Instrumentation

Engineering

Processor Architectures

TEC-- 009070

TEC008010

TJFC

Number

Edition

Class number

Paul, Somnath

Bhunia, Swarup

Ohio Library and Information Network

Date of Transaction

20150609113556.0

Cataloguing Rules (Descriptive Conventions))

pn

Electronic name

[Book]

Y