عنوان
پدید آورنده
موضوع
رده
TK 7874.75 .G65 1996
TK
7874
.
75
.
G65
1996
کتابخانه
محل استقرار
OTHER STANDARD IDENTIFIER
Standard Number
69957
LANGUAGE OF THE ITEM
.Language of Text, Soundtrack etc
English
TITLE AND STATEMENT OF RESPONSIBILITY
First Statement of Responsibility
Golze, Ulrich
Title Proper by Another Author
8491-
Title Proper
VLSI chip design with the hardware description language VERILOG : an introduction based on a large RISC processor design
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Berlin, New York
Name of Publisher, Distributor, etc.
Springer
Date of Publication, Distribution, etc.
1996
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
xiv, 358 p. : ill. ; 24 cm. + 1 computer disk )3 1/2 in.(
GENERAL NOTES
Text of Note
Includes bibliographical references and index
NOTES PERTAINING TO TITLE AND STATEMENT OF RESPONSIBILITY
Text of Note
Ulrich Golze ; with Peter Blinzer ... )et al.(
TOPICAL NAME USED AS SUBJECT
Entry Element
Design and construction -- Data processing ، Integrated circuits -- Very large scale integration
Entry Element
، Computer-aided design
Entry Element
، Verilog )Computer hardware description language(
Entry Element
Design and construction -- Data processing ، RISC microprocessors
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
7874
.
75
.
G65
1996
PERSONAL NAME - PRIMARY RESPONSIBILITY
Relator Code
AU
TI
LOCATION AND CALL NUMBER
Shelving Form of Title, Author, Author/Title
که فیزیه دانشکدانابخکت
