عنوان
پدید آورنده
موضوع
رده
TK 7874 .B484 1990
TK
7874
.
B484
1990
کتابخانه
محل استقرار
استان: Khorasan Razavi ـ شهر: Mashhad
OTHER STANDARD IDENTIFIER
Standard Number
21001
TITLE AND STATEMENT OF RESPONSIBILITY
First Statement of Responsibility
Bhattacharya, Debashis
Title Proper by Another Author
1691-
Title Proper
Hierarchical modeling for VLSI circuit testing
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Boston
Name of Publisher, Distributor, etc.
Kluwer Academic Publishers
Date of Publication, Distribution, etc.
1990
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
x, 159p. : ill
SERIES
Series Title
The Kluwer international series in engineering and computer science. VLSI, computer architecture, and digital signal processing
GENERAL NOTES
Text of Note
Bibliography: p. ]149[-155
NOTES PERTAINING TO TITLE AND STATEMENT OF RESPONSIBILITY
Text of Note
by Debashis Bhattacharya, John P. Hayes
TOPICAL NAME USED AS SUBJECT
Entry Element
Very large scale integration - Testing ، Integrated circuits
Entry Element
Very large scale integration - Computer simulation ، Integrated circuits
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
7874
.
B484
1990
PERSONAL NAME - PRIMARY RESPONSIBILITY
Relator Code
AU
AU Hayes, John Patrick 1944-
TI
SE
LOCATION AND CALL NUMBER
Call Number Suffix
CL
