عنوان

Memory-based logic synthesis

Standard Number

1968

First Statement of Responsibility

Sasao, Tsutomu,0591-author.

Title Proper

Memory-based logic synthesis

Specific Material Designation and Extent of Item

xii, 189 pages , illustrations , 24 cm

Text of Note

Includes bibliographical references )pages 179-186( and index.

Text of Note

"This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays )FPGAs( that contain both small-scale memories, called look-up tables )LUTs(, and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs. Anyone using logic gates to design logic circuits, you can benefit from the methods described in this book. Describes in detail the synthesis of logic functions using memories; Introduces a look-up tables )LUT( cascade as a new architecture for logic synthesis; Shows logic design methods for index generation functions; Introduces C-measure, which specifies the complexity of Boolean functions; Introduces hash-based design methods, which efficiently synthesize index generation functions by pairs of smaller memories and can be applied to IP address tables, packet filtering, terminal access controllers, memory patch circuits, virus scanning circuits, intrusion detection circuits, fault map of memories, code converters and pattern matching"--Publisher.

Entry Element

، Logic circuits

Entry Element

، Field programmable gate arrays, Design and construction

Entry Element

، Semiconductor storage devices

Number

Class number

Relator Code

AU

Entry Element

Tsutomu Sasao

TI

Shelving Form of Title, Author, Author/Title

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