Proceedings: IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems: 25-27 Oct. 2000, Yamanashi, Japan
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Los Alamitos
Name of Publisher, Distributor, etc.
IEEE Computer Society Press
Date of Publication, Distribution, etc.
2000
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
xii, 422 p.: ill.; 23 cm
GENERAL NOTES
Text of Note
Includes bibliographical references and author index
TOPICAL NAME USED AS SUBJECT
Entry Element
Congresses ، Integrated circuits-- Very large scale integration-- Design and construction
Entry Element
Congresses ، Fault-tolerant computing
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
7874
.
I176
2000
PERSONAL NAME - PRIMARY RESPONSIBILITY
Relator Code
AU
Entry Element
sponsored by the IEEE Computer Society, the IEEE Computer Society Technical Committee on Fault-Tolerant Computing, IEEE Computer Society Test Technology Technical Committee
CO IEEE Computer Society
CO IEEE Computer Society. Fault-Tolerant Computing Technical Committee
CO IEEE Computer Society. Test Technology Technical Committee
TI
CORPORATE BODY NAME - SECONDARY RESPONSIBILITY
Entry Element
IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems )2000: Yamanashi, Japan(