عنوان
پدید آورنده
موضوع
رده
TK 7868 .L6 .L626 1984
TK
7868
.
L6
.
L626
1984
کتابخانه
محل استقرار
OTHER STANDARD IDENTIFIER
Standard Number
101832
LANGUAGE OF THE ITEM
.Language of Text, Soundtrack etc
بهار۴۷
.Language of Text, Soundtrack etc
English
TITLE AND STATEMENT OF RESPONSIBILITY
General Material Designation
)50(
Title Proper
Logic minimization algorithms for VLSI synthesis
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Boston
Name of Publisher, Distributor, etc.
Kluwer Academic Publishers
Date of Publication, Distribution, etc.
c1984
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
ix, 193 p. : ill. ; 25 cm
SERIES
Series Title
The Kluwer international series in engineering and computer science; SECS 2. )VLSI, computer architecture, and digital signal processing
GENERAL NOTES
Text of Note
Bibliography: p. ]174[-190
Text of Note
Includes index
TOPICAL NAME USED AS SUBJECT
Entry Element
، Logic design
Entry Element
، Integrated circuits-- Very large scale integration
Entry Element
، Integrated circuits-- Design and construction-- Data processing
Entry Element
، Algorithms
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
7868
.
L6
.
L626
1984
PERSONAL NAME - PRIMARY RESPONSIBILITY
Relator Code
TI
Entry Element
by Robert K. Brayton ... ]et al.[
AU .gniK treboR ,notyarB
TI Logic minimization algorithms for V.L.S.I. synthesis
SE
LOCATION AND CALL NUMBER
Shelving Form of Title, Author, Author/Title
05
