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عنوان
Digital system test and testable design
پدید آورنده
Zainalabedin Navabi
موضوع
Digital integrated circuits, Testing,Digital integrated circuits, Design and construction,Verilog (Computer hardware description language)
رده
TK
،
7874
،.
N38
،
2011
کتابخانه
Central Library and Information Center of Shahed University
محل استقرار
استان:
Tehran
ـ شهر:
Tehran
تماس با کتابخانه :
51214110
-
021
INTERNATIONAL STANDARD BOOK NUMBER
(Number (ISBN
9781441975478
English Book
TITLE AND STATEMENT OF RESPONSIBILITY
Title Proper
Digital system test and testable design
Other Title Information
using HDL models and architectures
First Statement of Responsibility
Zainalabedin Navabi
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
New York
Name of Publisher, Distributor, etc.
Springer,
Date of Publication, Distribution, etc.
c2011
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
xxiii, 435 p. , ill. , 27 cm.
GENERAL NOTES
Text of Note
Title
INTERNAL BIBLIOGRAPHIES/INDEXES NOTE
Text of Note
Includes bibliographical references and index.
TOPICAL NAME USED AS SUBJECT
Entry Element
Digital integrated circuits, Testing
Entry Element
Digital integrated circuits, Design and construction
Entry Element
Verilog (Computer hardware description language)
DEWEY DECIMAL CLASSIFICATION
Number
621
.
3815
.
48
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
Book number
7874
Classification Record Number
.
N38
2011
PERSONAL NAME - PRIMARY RESPONSIBILITY
Entry Element
Navabi, Zainalabedin.
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