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Advanced Digital Logic Design: using Verilog, State Machines, and Synthesis for FPGAs
پدید آورنده
Sunggu Lee
موضوع
Logic circuits -- design and construction -- data processing,Verilog (Computer hardware description language),Computer-aided design
رده
TK
،
7868
،.
L6
,
L4
،
2006
کتابخانه
Central Library and Information Center of Shahed University
محل استقرار
استان:
Tehran
ـ شهر:
Tehran
تماس با کتابخانه :
51214110
-
021
English Book
TITLE AND STATEMENT OF RESPONSIBILITY
Title Proper
Advanced Digital Logic Design: using Verilog, State Machines, and Synthesis for FPGAs
First Statement of Responsibility
Sunggu Lee
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Mason, OH
Name of Publisher, Distributor, etc.
Thomson
Date of Publication, Distribution, etc.
2006
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
462 p.
TOPICAL NAME USED AS SUBJECT
Entry Element
Logic circuits -- design and construction -- data processing
Entry Element
Verilog (Computer hardware description language)
Entry Element
Computer-aided design
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
Book number
7868
Classification Record Number
.
L6
,
L4
2006
PERSONAL NAME - PRIMARY RESPONSIBILITY
Entry Element
Lee, Sunggu
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