عنوان
پدید آورنده
موضوع
رده
TK 7874 .L5 1997
TK
7874
.
L5
1997
کتابخانه
محل استقرار
English
VLSI circuit simulation and optimization
London, New York
Chapman & Hall
c1997
xii, 353 p. : ill. ; 24 cm
V. Litovski and M. Zwolinski
1
Design and construction ، Integrated circuits
Data processing ، Integrated circuits - Very large scale integration
Mathematical models ، Integrated circuits - Very large scale integration
TK
7874
.
L5
1997
Litovski, V.
AU
AU Zwolinski, M.
TI
