عنوان
پدید آورنده
موضوع
رده
TK 7871 .99 .M44 J47
TK
7871
.
99
.
M44
J47
کتابخانه
محل استقرار
The gm/ID design methodology, a sizing tool for low-voltage analog CMOS circuitsthe semi-empirical and compact model approaches
Dordrecht; London; New York
Springer
c2010
xvi, 171 p. : ill
Analog circuits and signal processing
In title "gm/ID" both the m and D are subscript
Includes bibliographical references )p.167-168( and index
by Paul G.A. Jespers
Design and construction ، Metal oxide semiconductors, Complementary
Design and construction ، Low voltage integrated circuits
Design and construction ، Linear integrated circuits
، Electronic books
TK
7871
.
99
.
M44
J47
Jespers, Paul G.
AU
TI
