• الرئیسیة
  • البحث المتقدم
  • قائمة المکتبات
  • حول الموقع
  • اتصل بنا
  • نشأة

عنوان
Wafer-level testing and test during burn-in for integrated circuits /

پدید آورنده
Sudarshan Bahukudumbi, Krishnendu Chakrabarty.

موضوع
Integrated circuits-- Testing.,Integrated circuits-- Wafer-scale integration.,Semiconductors-- Testing.,Integrated circuits-- Testing.,Integrated circuits-- Wafer-scale integration.,Semiconductors-- Testing.,TECHNOLOGY & ENGINEERING-- Electronics-- Digital.,TECHNOLOGY & ENGINEERING-- Electronics-- Microelectronics.

رده
TK7874
.
B35
2010

کتابخانه
کتابخانه مطالعات اسلامی به زبان های اروپایی

محل استقرار
استان: قم ـ شهر: قم

کتابخانه مطالعات اسلامی به زبان های اروپایی

تماس با کتابخانه : 32910706-025

1596939907
9781596939905
1596939893
9781596939899

b765492

Wafer-level testing and test during burn-in for integrated circuits /
[Book]
Sudarshan Bahukudumbi, Krishnendu Chakrabarty.

Boston :
Artech House,
2010.

1 online resource (xv, 198 pages) :
illustrations

Artech House integrated microsystems series

Includes bibliographical references and index.

Wafer-Level Test and Burn-In: Industry Practices and Trends -- Resource-Constrained Testing of Core-Based ScCs -- Defect Screening for "Big-D/Small-A" Mixed-Signal SoCs -- Wafer-Level Test During Burn-In: Test Scheduling for Core-Based SoCs -- Wafer-Level Test During Burn-In: Power Management by Test-Pattern Ordering -- Wafer-Level Test During Burn-In: Power Management by Test-Pattern Manipulation.
0

Wafer-level testing refers to a critical process of subjecting integrated circuits and semiconductor devices to electrical testing while they are still in wafer form. Burn-in is a temperature/bias reliability stress test used in detecting and screening out potential early life device failures. This hands-on resource provides a comprehensive analysis of these methods, showing how wafer-level testing during burn-in (WLTBI) helps lower product cost in semiconductor manufacturing. Engineers learn how to implement the testing of integrated circuits at the wafer-level under various resource constraints. Moreover, this book helps practitioners address the issue of enabling next generation products with previous generation testers. Practitioners also find expert insights on current industry trends in WLTBI test solutions.

Wafer-level testing and test during burn-in for integrated circuits / Sudarshan Bahukudumbi, Krishnendu Chakrabarty.
1596939893

Integrated circuits-- Testing.
Integrated circuits-- Wafer-scale integration.
Semiconductors-- Testing.
Integrated circuits-- Testing.
Integrated circuits-- Wafer-scale integration.
Semiconductors-- Testing.
TECHNOLOGY & ENGINEERING-- Electronics-- Digital.
TECHNOLOGY & ENGINEERING-- Electronics-- Microelectronics.

TEC-- 008060
TEC-- 008070

621
.
381
22

TK7874
.
B35
2010

Bahukudumbi, Sudarshan.

Chakrabarty, Krishnendu.

20201206110109.0
pn

 مطالعه متن کتاب 

[Book]

Y

الاقتراح / اعلان الخلل

تحذیر! دقق في تسجیل المعلومات
ارسال عودة
تتم إدارة هذا الموقع عبر مؤسسة دار الحديث العلمية - الثقافية ومركز البحوث الكمبيوترية للعلوم الإسلامية (نور)
المكتبات هي المسؤولة عن صحة المعلومات كما أن الحقوق المعنوية للمعلومات متعلقة بها
برترین جستجوگر - پنجمین جشنواره رسانه های دیجیتال