System level design from HW/SW to memory for embedded systems :
[Book]
5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3-6, 2015, Proceedings /
Marcelo Götz, Gunar Schirner, Marco Aurélio Wehrmeister, Mohammad Abdullah Al Faruque, Achim Rettberg (eds.).
Cham, Switzerland :
Springer,
2017.
1 online resource (xii, 231 pages) :
illustrations
IFIP advances in information and communication technology,
523
1868-4238 ;
Includes author index.
International conference proceedings.
This book constitutes the refereed proceedings of the 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, held in Foz do Iguaçu, Brazil, in November 2015. The 18 full revised papers presented were carefully reviewed and selected from 25 submissions. The papers present a broad discussion on the design, analysis and verification of embedded and cyber-physical systems including design methodologies, verification, performance analysis, and real-time systems design. They are organized in the following topical sections: cyber-physical systems, system-level design; multi/many-core system design; memory system design; and embedded HW/SW design and applications.
Springer Nature
com.springer.onix.9783319900230
9783319900223
IESS 2015
Embedded computer systems, Congresses.
Computer hardware.
Computers-- Expert Systems.
Computers-- Hardware-- General.
Computers-- Information Technology.
Computers-- Software Development & Engineering-- General.
Embedded computer systems.
Expert systems-- knowledge-based systems.
Software Engineering.
Systems analysis & design.
COM025000
UYQE
006
.
2/2
23
TK7895
.
E42
Al Faruque, Mohammad Abdullah
Götz, Marcelo
Rettberg, Achim
Schirner, Gunar
Wehrmeister, Marco Aurélio
IFIP TC10 Working Conference: International Embedded Systems Symposium(5th :2015 :, Foz do Iguaçu, Brazil)