edited by Muhammad Yasir Qadri, Stephen J. Sangwine
xxvi, 465 pages :
illustrations ;
24 cm
Embedded multi-core systems
Includes bibliographical references and index
The advent of the multicore processor era has impacted many areas of computer architecture design, from memory management and thread scheduling to inter-processor communication, debugging, power management, and more. Multicore Technology: Architecture, Reconfiguration, and Modeling gives a holistic overview of the field of multicore architectures to guide readers interested in further research and development. Featuring contributions by researchers from renowned institutes around the world, this book explores a broad range of topics. It brings together a variety of perspectives on multicore embedded systems and identifies the key technical challenges that are being faced. In five parts, the book covers: Architecture and design flow solutions, including the MORA framework for field programmable gate array (FPGA) programming, a synchronous data flow (SDF)-based design flow, and an asymmetric multi-processor system-on-chip (MPSoC) framework called SESAM, Work being done on parallelism and optimization, including an extension to atomic verifiable operation (AVOp) streams to support loops and a mechanism for accelerated critical sections (ACS) to reduce performance degradation due to critical sections, Tools for memory systems, including a multicore design space exploration tool called TMbox and techniques for more efficient shared memory architectures and scheduling, Multi-threaded software debugging schemes, Network-on-chip (NoC) issues, with coverage of interconnects: routing topologies, router architecture, switching techniques, flow control, traffic patterns, and routing algorithms; a comparison between mesh- and tree-based NoCs in 3D systems-on-chip; and a proposed performance evaluation method, A comprehensive survey of state-of-the-art research in multicore processor architectures, this book is also a valuable resource for anyone developing software and hardware for multicore systems. Book jacket